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Description: Embedded Systems Developer RISC-V Blog
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May 11, 2023 | Updates ( interrupts , quickref )
A fix has been made to the Interrupts/Exceptions Quick Reference to clarify that mstatus . mpp is set to the the least-privileged supported mode on mret . The local version of Machine-Level ISA has been updated to the Priv-v1.12 source as this is the current version on https://riscv.org/technical/specifications/ . References to the depreciated user mode interrupts and the n extension were also removed.
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